ti tda3 memory mapping (inner nor-, nand-, sram-memories and external sdram ddr), memory subsystem (emif, gpmc, ocm) and interconnect (L3, L4)

 GPMC, EMIF, OCM in L3, L4 interconnect

TDA3 memory map

Memory subsystem

EMIF controller

ti tda3 (tda3ma, tda3md, tda3mv, tda3la):
1) datasheet
2) trm

3) dm505 datasheet

arm cortex-m4:
1) trm
2) generic user guide

wiki:

1) https://ru.wikipedia.org/wiki/DDR_SDRAM